1. Field of the Invention
The present invention relates to a method for manufacturing strained-channel MOS transistors.
2. Discussion of the Related Art
Integrated MOS transistors are formed at the surface of semiconductor substrates. They include an insulated gate formed on the surface of the substrate and source and drain regions formed in the substrate, on either side of the gate.
In a semiconductor substrate, the carriers involved in N-channel or P-channel transistors do not move at the same speed. To improve the mobility of carriers, it is known to form different channel regions according to the type of carriers used. Especially, the mobility of carriers in P-channel MOS transistors is known to be greater when the channel is made of silicon-germanium rather than of silicon. For N-channel MOS transistors, a silicon substrate is better adapted. It can thus be provided to form, on a same structure, silicon-germanium channel regions for P-channel MOS transistors and silicon channel regions for N-channel MOS transistors.
It is also known that, on a same substrate, the mobility of some carriers can be improved by local application of a strain on the channel of the concerned transistors. This is especially described in publication “Electron Mobility Model for Strained-Si Devices”, by Dhar et al., TED 52 (2005).
Many methods have been provided to apply a local strain on the channel of given transistors. It has especially been provided to modify or to replace the material forming the source and drain regions so that the modified or replacement material applies a strain along the length of the transistor channel.
However, known methods are generally relatively complex to implement and necessitate a significant number of additional manufacturing steps with respect to conventional MOS transistor manufacturing methods.